Delta-sigma (ΔΣ, DS, sigma-delta, ΣΔ) modulation is a method for encoding analog signals into digital signals and is implemented in some analog-to-digital converters (ADCs). Delta-sigma modulation is also used to convert high bit count, low-frequency digital signals into lower bit count, higher frequency digital signals as part of the process of converting digital signals into analog signals in some digital-to-analog converters (DACs). Delta-sigma ADCs have advanced to where they are now suitable for converting analog signals over a wide range of frequencies, such as from DC to several megahertz. In general, delta-sigma ADCs consist of an oversampling modulator followed by a digital/decimation filter that together produce a high-resolution data-stream over a wide frequency range.
A delta-sigma modulator is central to a delta-sigma ADC. The delta-sigma modulator digitizes the analog input signal and reduces noise at lower frequencies. The delta-sigma ADC implements a noise shaping function that pushes low-frequency noise up to higher frequencies where the noise is outside the frequency band of interest. Noise shaping is one of the reasons that delta-sigma ADCs are well-suited for low-frequency, high-accuracy measurements. In a conventional ADC, an analog signal is integrated, or sampled, with a sampling frequency and subsequently quantized in a multi-level quantizer into a digital signal, which introduces quantization error noise.
The first step in delta-sigma modulation is delta modulation, whereby the change in the analog signal (its delta) is encoded, rather than encoding the absolute value of the analog signal. The result is a stream of pulses, as opposed to a stream of numbers as is the case with pulse-code modulation. In delta-sigma modulation, the accuracy of the modulation is improved by passing the digital output through a 1-bit DAC and adding (sigma) the resulting analog signal to the input analog signal, thereby reducing the error introduced by the delta modulation.
In multi-bit, continuous time delta-sigma modulators, DAC static mismatch and inter symbol interference (ISI) cause degradation in the noise floor and the harmonic performance. Typically, dynamic element matching (DEM)/data-weighted-averaging (DWA) schemes are implemented to shape this noise out of the desired frequency band. However, in high speed delta-sigma ADCs, the extra delays in the DEM/DWA block create excess loop delay and cause instability in the modulator.